- June 4, 2012:
Concept Engineering′s Nlview™
Schematic Visualization Engine to Power the Stylus™ Cockpit for
Tabula′s Spacetime™ 3D Architecture.
Design Automation Conference (DAC), San Francisco, California - June 4,
2012 - Tabula™, Inc., a privately held fables semiconductor company
developing 3D programmable logic devices (3PLD), is using Concept
Engineering′s Nlview™ automatic schematic generation and viewing
engine to power the Stylus™ GUI cockpit for Tabula′s patented
Spacetime™ 3D architecture. Nlview gives developers the ability to
analyze all aspects of a design together, accelerating end-product
time to market at lower costs.
- June 4, 2012:
Concept Engineering Adds Support
for Cadence® Virtuoso® Spectre® to StarVision™ PRO,
SpiceVision® PRO and SGvision™ PRO.
Design Automation Conference (DAC), San Francisco, California - June 4,
2012 - Concept Engineering is adding Cadence® Virtuoso® Spectre®
netlist support to its mixed-signal visualization and debugging tools,
StarVision™ PRO, SpiceVision® PRO and SGvision™ PRO.
Adding support for another leading simulation netlist to the Spice formats
that Concept already supports brings ultra fast design visualization and
debugging as well as reduced development time to customers who use
Spectre for circuit design and verification.
- June 6, 2011:
Concept Engineering′s NLVIEW™ Visualization Engine
Adopted by Calypto Design Systems to Power the Debugging GUI
of PowerPro® Product Family.
FREIBURG, Germany - Concept Engineering
and Calypto Design Systems have renewed an existing OEM agreement, allowing
Calypto to integrate and use Concept Engineering′s Nlview automatic
schematic generation and viewing software as the visualization
engine for the complete PowerPro product family. Calypto uses Nlview
within the graphical analyzer cockpit of the company′s power optimization
- June 2, 2011:
Concept Engineering Introduces Integrated Debugging Tool for
Mixed-signal Design at DAC 2011.
FREIBURG, Germany - Design and verification engineers who work on
complex analog/mixed-signal (AMS) designs or who need to customize and integrate
analog or digital IP building blocks into their system-on-chip (SoC) or integrated
circuit (IC) designs will be able to assess a new analysis and debugging tool at
DAC 2011. Due to the increasing use of building blocks in SoC design, engineers
need to work at different design levels (RTL, gate, transistor, analog, etc.)
as well as with different design languages and netlist formats. To support this
challenge, Concept Engineering developed StarVision PRO, an integrated debugging
cockpit for AMS and digital design that makes analysis and debugging of complex
SoC and IC designs easy and more transparent.
- December 21, 2010:
Concept Engineering Announces 20th Anniversary.
FREIBURG, Germany - Concept Engineering, developer of
visualization and debugging technology for the electronic design
automation (EDA) market, celebrates the 20th year of providing customers
with leading-edge visualization and debugging technology. The company
attributes its success and its 17th consecutive year of profitability
to innovative technology and long-term commitment to creating value
- June 14, 2010:
Concept Engineering′s Nlview™ Visualization Engine
Adopted by Altos Design
Automation to Power New Debug and Process Control GUI.
FREIBURG, Germany - Concept Engineering today announced that Altos
Design Automation has signed a worldwide licensing agreement to integrate and use
Concept Engineering′s Nlview™ visualization engine to power their new
generation debug and process control graphical cockpit. Altos provides ultra-fast, fully-automated
characterization technology for the creation of library views to address key nanometer
challenges such as low power, timing, yield and process variation. Nlview, coupled
with Concept Engineering′s T-engine™ option for automatic transistor-level
schematic generation, will give Altos a high-performance, high-capacity GUI that
provides very detailed visual feedback about critical circuit attributes discovered
by the Altos characterization engine.
- June 14, 2010:
Concept Engineering Enhances Automatic Transistor-Level Schematic
FREIBURG, Germany - With more analog building blocks being
integrated into modern mixed-signal systems-on-chip (SoCs) and with parasitic
effects getting more complex with each process node, there is clear and
increasing need for improved mixed-mode, analog, and parasitic network
visualization capabilities. Recognizing this need, Concept Engineering has
significantly improved analog and mixed-signal (A/MS) visualization capabilities
for T-engine™, the company′s core technology for automatic transistor-level
schematic generation. The enhanced T-engine automatically draws easy-to-read
and easy-to-understand schematics for both A/MS and digital circuits.
- July 27, 2009:
Oasys Design System Signs WorldWide OEM Agreement to Integrate Concept
Engineering′s NlView Visualization Engine.
FREIBURG, Germany - Concept Engineering today announced that Oasys
Design Systems, Inc., developer of the RealTime Designer full-chip physical
register transfer-level (RTL) synthesis product, has signed a worldwide OEM
license for Concept Engineering′s Nlview™ visualization engine. Nlview is
integrated into RealTime Designer to power its debugging GUI. Design engineers
using RealTime Designer bundled with Nlview benefit from a high-performance,
high-capacity debugging cockpit and from very detailed visual feedback about the
RTL code and the physical synthesis process.
- June 9, 2008:
Pro Design Electronic Signs Worldwide OEM License
for Concept Engineering′s Nlview™ Visualization Engine.
FREIBURG, Germany - Concept Engineering today announced that Pro Design
Electronic GmbH, a global service provider and manufacturer in the electronics industry,
has signed a worldwide OEM license for Concept Engineering's Nlview visualization
engine. Integrated into the Pro Design CHIPit Software Environment, the Nlview engine
will provide an easy-to-use, high performance debugging cockpit for Pro Design′s end
users and faster time to market for the new Pro Design CHIPit product family.
- June 6, 2008:
HeedSoft S.A.R.L. Signs Worldwide OEM License for
Concept Engineering′s Nlview™ Visualization Engine and
Transistor-level Schematic Generator.
FREIBURG, Germany - Concept Engineering today announced that HeedSoft S.A.R.L.,
developer of the TLL™ advanced transistor abstraction tool, has signed a worldwide OEM
license for Concept Engineering′s Nlview™ visualization engine and T-engine™
transistor-level schematic generator. Bundling Concept′s Nlview software family into the
HeedSoft TLL tool gives design engineers detailed visual feedback about the performed
translation process, enabling them to visualize the original transistor-level input
circuits and the automatically abstracted, higher-level RTL descriptions.
- May 30, 2007:
DAFCA Selects Concept Engineering′s Nlview™ Visualization Engine
to Build a Graphical Debugging Cockpit.
Freiburg, Germany - Concept Engineering today announced that DAFCA, Inc.,
the leading vendor of on-chip reconfigurable infrastructure and tools for in-system,
at-speed silicon validation, has selected Concept Engineering′s Nlview™ visualization
engine to build a graphical debugging cockpit for its ClearBlue™ Silicon Validation
Platform. Integrated into the DAFCA tool environment, the Nlview engine automatically
generates schematic diagrams showing the instrumentation intellectual property (IP) and
making it easy for design engineers to understand and configure the instrumentation
- January 2008:
Gerhard Angst from Concept Engineering receives EDA Achievement Award 2007.
Gerhard Angst and the Concept Engineering team were singled out by
edacentrum, an independent association
dedicated to the promotion of research and development in the area of
electronic design automation (EDA), to receive the EDA Achievement Award
2007 for his achievements in research and development within the EDA field.
Each year the EDA Achievement Award is given by edacentrum to a team or
individual, who reached excellent results in research or development within
the field and who contributed to the improvements within the Ekompass Project
(Ekompass is a funding program set up by the German Ministry of Education
and Research (BMBF) to stimulate EDA research. Ekompass means "design
platform for complex applied systems and circuits in microelectronics"
For more information on edacentrum and the EDA Achievement Award, please visit
- May 16, 2007:
Concept Engineering to Join Sequence In-Sequence Program.
Santa Clara, Calif. - Sequence Design today announced that
Concept Engineering has joined its In-Sequence Technology Partner Program,
promoting EDA interoperability and advanced design methodologies.
Concept Engineering is integrating its visualization technology into
Sequence′s low-power analysis and optimization tools to improve
exploration and debug capabilities.
- April 16, 2007:
Concept Engineering Announces a DSPF Interface for SpiceVision® PRO
and SGvision® PRO.
New Interface Enables Engineers to Fully Understand
the Impact of Parasitic Elements on Their Designs.
Freiburg, Germany - Concept Engineering today announced a new detailed
standard parasitic format (DSPF) interface to the company′s SpiceVision®
PRO and SGvision® PRO products that will enable design engineers to
better understand, manage, and fix parasitic structures within complex
digital, mixed-signal, and analog ICs.
- July 21, 2006:
Concept Engineering Introduces SGvision™ PRO to Help System-on
Chip Designers Analyze and Debug Mixed-Mode Circuits.
Tool provides detailed information for both digital and analog or
Freiburg, Germany - Concept Engineering today announced the
release of SGvision™ PRO, a mixed-mode debugging tool that allows
system-on-chip (SoC) designers and verification engineers to more quickly
analyze and debug circuits that contain both digital and transistor-level
components. SGvision PRO supports mixed-level debugging of SPICE and Verilog
standard languages at the same time.
- July 6, 2006:
Concept Engineering introduces RTLvision™ PRO to help designers
of IP-based System-on-Chipr reach faster RTL code closure.
debugging tool supports SystemVerilog, Verilog and VHDL
FREIBURG, Germany - Concept Engineering today announced the
release of RTLvision™
PRO, a customizable tool to help designers of intellectual property (IP)-based
system-on-chip reduce the complexity of the debug process and makes it easier
to understand and change register-transfer level (RTL) code.
EETimes article (GIF file),
SOC Central article (GIF file).
- March 8, 2006:
Nascentric supports SpiceVision® PRO from Concept
Engineering. Hierarchical Schematic Viewer integrates
with Nascim Simulator.
Austin, Texas - Nascentric today announced they will be
integrating Nascim® with SpiceVision PRO from Concept Engineering.
SpiceVision is a powerful, hierarchical, customizable transistor-level
debugger and schematic browser enabling circuit designers to view their
SPICE netlists, clearly and easily, thus helping to reduce debugging
and design time.
- March 7, 2006:
Concept Engineering Licenses Schematic Visualization Software
to JEDAT, Inc. JEDAT incorporates both NlviewQT and T-engine
visual debugging software into Alpha-SX.
FREIBURG, Germany; TOKYO, Japan - Concept Engineering and
JEDAT, Inc., formerly the EDA Systems Division of Seiko Instruments Inc.
(SII), today signed a worldwide OEM license agreement to incorporate Concept
Engineering's NlviewQT Widget and T-engine visual schematic and debugging
software engines into JEDAT's Alpha-SX product line.
- June 13, 2005:
Concept Engineering releases GateVision® PRO -
a debugging tool for the verification of complex chips.
New GateVision PRO
gives designers more control over gate-level debugging of ICs, SoCs,
IP blocks, FPGAs.
Concept Engineering GmbH today announced GateVision PRO, a gate-level debugging tool that offers higher performance and an open application programming interface (API) that allows chip designers to customize and implement their own debugging functions. In addition, a new 64 bit database provides higher capacity, giving chip design teams the ability to debug large, complex chips.
- June 13, 2005:
Concept Engineering's T-engine™ empowers visual debugging
in imPROVE-TLL, TransEDA's functional abstraction tool.
Integration helps designers to better understand, control and debug the logical abstraction process of their full-custom digital IP blocks.
Concept Engineering today announced a multi-year worldwide OEM license agreement with TransEDA, a leading provider of coverage and verification measurement solutions for electronic designs. TransEDA has integrated Concept Engineering's NlviewQT Widget™ with the transistor-level visualization option (T-engine™) into TransEDA's imPROVE-TLL transistor-level functional abstraction tool.
- April 14, 2005:
Concept Engineering improves transistor-level debugging and
optimization for chip designers using Cadence Virtuoso schematic editor environment.
New SpiceVision PRO option automatically generates schematic fragments for export to Cadence's Virtuoso design technology.
Concept Engineering GmbH today announced the availability of a product that improves transistor-level debugging and optimization for integrated circuit (IC) and system-on-chip (SoC) designers who are using the Virtuoso Schematic Editor environment from Cadence Design Systems, Inc. (NYSE: CDN) (Nasdaq: CDN).
- March 7, 2005:
Concept Engineering continues to broaden GUI platform support for
EDA tool developers and semiconductor companies.
Nlview, industry-standard schematic viewing technology, now supports wxWidgets.
Concept Engineering GmbH today announced NlviewWX™, the sixth engine in a steady stream of visualization software components that already support Tcl/Tk, Java, the Microsoft Foundation Class (MFC) Library, Qt, and Perl.
- June 4, 2004:
Silicon Navigator licenses Concept Engineering's schematic
Concept Engineering today announced a worldwide OEM license agreement with Silicon Navigator Corp. to bundle Concept Engineering's NlviewQT Widget, a Qt-based visual debugging software engine, into Silicon Navigator's OpenAccess technology for integrated circuit (IC) timing and placement optimization.
- June 2, 2004:
Hier Design licenses Concept Engineering's schematic visualization software.
Hier Design incorporates NlviewJA Widget visual debugging software into PlanAhead™ hierarchical floorplanner.
Concept Engineering and Hier Design Inc. today announced a worldwide OEM license agreement to bundle Concept Engineering's NlviewJA Widget, a JAVA-based visual debugging software engine, into Hier Design's PlanAhead™ hierarchical floorplanning and analysis software.
- June 1, 2004:
Concept Engineering adds 64-Bit support to SpiceVision® PRO to
accelerate debug and analysis of complex digital, mixed-signal, and analog ICs.
SpiceVision PRO allows transistor-level analysis and navigation of largest, most complex designs.
Concept Engineering today announced the release of SpiceVision PRO 2.4, its industry-standard interactive visualization tool for chip designers who need to debug and analyze SPICE circuits and models. Version 2.4 supports the latest 64-bit chips.
- June 13, 2003:
Concept Engineering has released a new Perl/Tk software component for its Nlview Widget family that enables developers to build powerful electronic design automation (EDA) tools based on Perl, and to use Tk to realize intuitive graphical user interfaces.
Atrenta Inc. (San Jose, Calif.) has signed a licensing agreement with Concept Engineering to incorporate the new component, called NlviewPTK Widget, into its SpyGlass® family of predictive analyzers.
- May 28, 2003:
Prover Technology OEMs Schematic Viewer From Concept Engineering.
EDA component improves time-to-market for state-of-the-art debug
support in Prover eCheck.
Concept Engineering and Prover Technology today announced an
OEM agreement that gives Prover Technology the right to use
Concept's Nlview™ Widget in the Prover® eCheck
- May 27, 2003:
Concept Engineering and Nassda Improve Debug Of
High-performance Digital Designs.
Nassda offers Concept's
visualization technology through OEM agreement.
Concept Engineering, the industry leader in automatic schematic
generation and viewing technology, today announced that its
visualization technology, SpiceVison® PRO, has been integrated
with the CRITIC and HANEX digital circuit analysis software from
- February 24, 2003:
Concept Engineering Introduces New SpiceVision® PRO to
Accelerate Debugging Process for Complex Digital, Mixed-Signal,
and Analog ICs.
Concept Engineering today announced the release of SpiceVision® PRO,
a "turbo" version of SpiceVision.
- May 6, 2002:
Concept Engineering Introduces New SpiceVision® Interactive
Visualization Tool for Transistor-level Design and Debugging.
SpiceVision visualizes the circuit structures that cause signal integrity
and timing problems in deep submicron designs, accelerating the design and debug
process for designers of digital, mixed-signal, and analog ICs
- March 12, 2002:
Concept Engineering Adds Transistor-Level
Schematic Generator to Nlview Widget Family.
With visibility into transistor-level circuit structures, EDA tools
incorporating Concept's new Tengine™ make it easier to
fine-tune designs for maximum performance
- June 15, 2001:
Concept Engineering and Get2Chip improve
productivity for next generation SoC designs.
Get2chip embeds Concept Engineering's visualization technology into
architectural synthesis solution
- March 12, 2001:
Concept Engineering's Support for Qt Provides Boost to C++ EDA Developers.
Industry-standard schematic generation and viewing software is
now available for popular Qt graphical user interface application framework
- May 31, 2000:
Concept Engineering Simplifies Actel's FPGA Design Process.
Actel Adds Concept Engineering's Schematic Viewing Widget
to Designer Series Software.
- May 31, 2000:
Concept Engineering Nlview Widget Software now available
for 64-bit Solaris and HP-UX platforms.
GUI building blocks for EDA products
shorten design cycles, lower development and maintenance costs
- May 29, 2000:
Concept Engineering Expands European Operation to Sustain Growth
in Schematic Generation and Viewing Market Segment.
European headquarters relocates to larger premises.
- June 17, 1999:
Concept Engineering's Schematic Viewing Technology
for the Java Platform deployed in new Physical Design
System from Magma Design Automation.
Powerful schematic viewing features enhance physical design environment for
high complexity IC designs.
- March 10, 1999:
LSI Logic Adopts Concept Engineering's
Schematic Generation and Viewing
- Feb 10, 1999:
Concept Engineering receives research funding from
German Smart System Engineering (SSE) Initiative.
- June 12, 1998:
Concept Engineering and LogicVision sign
Concept Engineering Design Visualization Technology to be bundled
with LogicVision icBIST 3.0 (TM) Product.
- June 12, 1998:
DiagnoSYS Selects Concept Engineering's
Schematic Viewing Technology.
Cooperation provides PCB-to-Schematic reverse engineering flow
producing full Schematic Drawings.
- June 6, 1997:
Concept Engineering's Schematic Viewing
Technology Adopted By Emerging Synthesis Vendors.