We make things visible®

Concept Engineering provides visualization technology for the EDA market. Our automatic schematic generation, navigation and viewing technology is available as software component Nlview for EDA tool providers as well as software tools RTLvision, GateVision, SpiceVision and SGvision for electronic design engineers.

Our software helps engineers to understand, debug, document and interact with electronic design data. It fits into many spots in existing and future design flows, wherever displaying schematic diagrams (usually excerpts like cones, pathes, etc) is helpfull for understanding a certain situation or problem quickly. Our technology is used in many fields, including synthesis, verification, post-layout analysis, parasitic network exploration, LVS, etc.

Debugging Tools for IC, SoC and FPGA Designers
RTLvision® PRO	RTL-level Debugging
GateVision® PRO	Gate-level Debugging
SpiceVision® PRO	Transistor-level Debugging
SGvision™ PRO	Mixed-level Debugging
Software Components for EDA Tool Developers
Nlview™ T-engine™	Visualization Engines for EDA tool developers	Java Demo ActiveX Demo

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Concept Engineering’s Nlview™ Visualization Engine Adopted by Altos Design Automation to Power New Debug and Process Control GUI

FREIBURG, Germany - June 14, 2010 - Concept Engineering today announced that Altos Design Automation has signed a worldwide licensing agreement to integrate and use Concept Engineering’s Nlview™ visualization engine to power their new generation debug and process control graphical cockpit. Altos provides ultra-fast, fully-automated characterization technology for the creation of library views to address key nanometer challenges such as low power, timing, yield and process variation. Nlview, coupled with Concept Engineering’s T-engine™ option for automatic transistor-level schematic generation, will give Altos a high-performance, high-capacity GUI that provides very detailed visual feedback about critical circuit attributes discovered by the Altos characterization engine. Press Release.

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Concept Engineering Enhances Automatic Transistor-Level Schematic Generation Technology

FREIBURG, Germany - June 14, 2010 - With more analog building blocks being integrated into modern mixed-signal systems-on-chip (SoCs) and with parasitic effects getting more complex with each process node, there is clear and increasing need for improved mixed-mode, analog, and parasitic network visualization capabilities. Recognizing this need, Concept Engineering has significantly improved analog and mixed-signal (A/MS) visualization capabilities for T-engine™, the company’s core technology for automatic transistor-level schematic generation. The enhanced T-engine automatically draws easy-to-read and easy-to-understand schematics for both A/MS and digital circuits. Press Release.

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Oasys Design System Signs WorldWide OEM Agreement to Integrate Concept Engineering′s NlView Visualization Engine

FREIBURG, Germany - July 27, 2009 - Concept Engineering today announced that Oasys Design Systems, Inc., developer of the RealTime Designer full-chip physical register transfer-level (RTL) synthesis product, has signed a worldwide OEM license for Concept Engineering′s Nlview™ visualization engine. Nlview is integrated into RealTime Designer to power its debugging GUI. Design engineers using RealTime Designer bundled with Nlview benefit from a high-performance, high-capacity debugging cockpit and from very detailed visual feedback about the RTL code and the physical synthesis process. Press Release.

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Pro Design Electronic Signs Worldwide OEM License for Concept Engineering′s Nlview™ Visualization Engine (June 9, 2008)

FREIBURG, Germany - June 9, 2008 - Concept Engineering today announced that Pro Design Electronic GmbH, a global service provider and manufacturer in the electronics industry, has signed a worldwide OEM license for Concept Engineering's Nlview visualization engine. Integrated into the Pro Design CHIPit Software Environment, the Nlview engine will provide an easy-to-use, high performance debugging cockpit for Pro Design's end users and faster time to market for the new Pro Design CHIPit product family. Press Release.

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EDA Tech Forum, March 2008 - Parasitics: An Old Problem Reaches New Heights
Gerhard Angst, CEO & President, Concept Engineering GmbH

The semiconductor industry faces increasing challenges in the design of complex systems-on-chip, and while some have sprung from new, only recently anticipated sources, others are, in fact, very familiar. Foremost among these are the interconnect delays caused by the increasing influence of parasitic networks. Parasitic inductance is also a growing concern. Complete article

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More Success Stories

Check out our Press Archive to see why leading EDA vendors and semiconductor companies choose our advanced visualization and debugging technology to power their EDA tools and improve their design flows.