Concept Engineering Improves Transistor-Level Debugging and Optimization for Chip Designers Using Cadence Virtuoso Schematic Editor Environment
New SpiceVision PRO option automatically generates schematic fragments for export to Cadence's Virtuoso design technology
SAN JOSE, Calif. and FREIBURG, Germany – April 14, 2005 – Concept Engineering GmbH today announced the availability of a product that improves transistor-level debugging and optimization for integrated circuit (IC) and system-on-chip (SoC) designers who are using the Virtuoso Schematic Editor environment from Cadence Design Systems, Inc. (NYSE: CDN) (NASDAQ: CDN).
The new product, which Concept Engineering developed as a member of the Cadence Connections program, is an option to Concept's SpiceVision® PRO that automatically generates schematic fragments – critical paths or sections of a circuit – and exports them into the Cadence Virtuoso Schematic Editor environment. The product is based on "SKILL", a language developed by Cadence that enables users to customize the Cadence technology and to create interfaces with external tools that work with the Cadence environment.
Once schematic fragments are imported into the Cadence environment, designers can use the schematic fragments to perform transistor-level debugging and optimization. Surrounding circuit structures do not affect the schematic fragments during debugging, so simulation takes less time to complete.
SpiceVision PRO automatically creates easy-to-read circuit schematics from both pre- and post-layout transistor-level structures (SPICE netlist descriptions). A schematic interface to the Cadence environment using SKILL enables mutual customers to easily process design data. For example, designers can now easily simulate a critical path at the transistor level. The path is created using SpiceVision PRO and is exported into the Cadence Virtuoso Schematic Editor environment.
"Nanometer technology is forcing design engineers to understand, optimize and debug their chip designs at the transistor-level," said Gerhard Angst, president and CEO of Concept Engineering. "SpiceVision PRO and the new SKILL interface help with this process."
Azul Systems, pioneers of the industry's first network attached processing solution that promises to dramatically alter economics around the delivery of compute resources, has built an innovative multi-core processor-chip technology using SpiceVision PRO and the SKILL interface. This technology finds circuit fragments that need to be taken back into the Cadence software for further analysis and debugging.
"The ability of the new interface to 'cookie cut' schematic fragments saves us from analyzing and debugging a full circuit description," said Scott Sellers, Azul System's vice president of hardware engineering, CTO, and co-founder. "Therefore, we're now saving substantial simulation time."
"The Cadence Connections program promotes collaboration and helps bring emerging third-party solutions to the customer's design chain quickly," said Pat Dutrow, director of the Cadence Connections program. "Our users wanted an efficient flow for transistor-level debugging. Concept Engineering has a complementary debug solution that, when combined with the Virtuoso environment, helps address specific customer needs such as post-layout transistor-level debugging and circuit fragment simulation. This is a good example of how Cadence uses an open collaboration approach to deliver customer-focused solutions."
Price and Availability
The SKILL-based schematic fragment export capability is available immediately as an option to SpiceVision PRO. Pricing details can be obtained by contacting Concept Engineering and its distribution partners www.concept.de.
About Concept Engineering
Concept Engineering is a privately held company based in Freiburg, Germany, founded in 1990 to develop and market innovative schematic generation and viewing technology for use with logic synthesis, verification, test automation and physical design tools. The company's customers are primarily original equipment EDA tool manufacturers (OEMs), in-house CAD tool developers and semiconductor companies. For more information, see www.concept.de
About Cadence Connections Program
The Cadence Connections program promotes open interoperability in all areas of electronic design including digital, custom IC, analog/mixed-signal and PCB design. By attracting best-in-class partners, Cadence offers the industry's largest collection of third-party solutions operating fully with the Cadence suite of design tools. The Connections Program has over 130 member companies working toward developing an optimized silicon design chain for customers. Information about the Connections Program may be found at www.cadence.com/partners/connections/.
Cayenne Communication LLC for Concept Engineering
Michelle Clancy, +1-252-940-0981, email@example.com